Alan,
What how do you think the program executable would fail when trying to run it on the X86 chipset? When the compile happens on the Sparc hardware, is there some flag set that says it must run on a Sparc? Guess what I'm trying to say is why would the compiler care about the hardware? I'm assuming some instruction sets are different yet what if those instructions are not used?
Thanks again.
> some flag set that says it must run on a Sparc? Guess
> what I'm trying to say is why would the compiler care
> about the hardware? I'm assuming some instruction
It has no choice but to fail. SPARC is big endian, Intel etc... are little endian. One reads from the left the other from the right. How could it possibly work?
cross = cross compiler / cross platform compiler in this thread
alan
Alan,
So in our case we have IBM Blade Centers (HS21s) and VMWARE to virtualize multiple operating systems and support.
And your saying that if we had to move applications from a Sparc platform to this new platform, that all these applications would need to be recompiled?
Thanks again.