Microarchitecture simulator for T1
I guess the simulator for OpenSPARC T1 SAM is an instruction accurate simulator. SAS is a full system simulator which includes SAM.
But, what i am looking for a microarchitecture simulator like MET (Microarchitectural Exploration Tool set) of IBM. In other words i need a cycle accurate simulator and not instruction accurate simulator.
Kindly tell me the potentiality of SAM. Is there a cycle accurate simulator for T1 avaiable.
Thanks
[461 byte] By [
Sairam9a] at [2007-11-27 4:12:27]
# 1
Currently there is no cycle-accurate simulator available in the OpenSparc package, however several universities have expressed interest in developing/contributing cycle-accurate simulators this year, and we would certainly encourage such contributions to the OpenSPARC community. Please monitor this space for future development.
Thanks,
Jhychun
# 2
The M5 Simulator has some basic support for SPARC. The 2.0 beta 3 version should appear on the M5 website, www.m5sim.org, in the next few days. It supports running binaries in our syscall emulation mode where we fake syscalls (similar to the way simple scalar did it), but take real traps for things like register windows. Additional, it has limited support for full-system simulation. It support booting a single processor, but it doesn't support any real devices yet (it uses the same hypervisor calls Legion does to read block off the disk image, and doesn't have any support for networking), only support booting one processor at the moment, and hasn't been exhaustively tested. It does however boot to a solaris prompt.
Ali
# 3
Thanks, I was searching for any other cycle accurate simulators, but could not find any one which is open. Is there any cycle accurate simulator for PowerPC or SPARC.
I would like to know which universities are working on cycle accurate simulators. Kindly educate me with this information.
Thanks.,
Sudheer.
