code question
hi guys:
currently,I try to use the S1 module map to FPGA.When I study the bw_r_dcd(dcache Vlog module ),I find the synthesis tool will compile different module when `define FPGA_SYN or `define DEFINE_0IN.My question is the two instance are difference in function?In other word,can I use `define DEFINE_0IN instead of `define FPGA_SYN when I map the code to FPGA ?3Q

