the supported virtual address width

hello, all

In tag of TLB, from the CHAPTER 13 of "OpenSPARC?T1 Processor Megacell Specification", the supported virtual address width is 35-bit. But in "UltraSPARC T1?Supplement to the UltraSPARC Architecture 2005" , the supported width of VA is 48.

I don't know which is right.

In tag of TLB, besides the 35-bit virtual address, there is 13-bit context. what is context?

thanks.

[414 byte] By [linuxworld] at [2007-11-26 10:14:11]