[OpenSPARC announce] S1 Core project on SunSource
Hi all,
few days ago we have released the S1 Core and then we have
created a project page for it at:
http://s1.sunsource.net/
You can read the full press release of the shipment on
several sites, for instance on
http://s1.sunsource.net/servlets/NewsItemView?newsItemID=229
Basically the S1 Core is a project to create a cut-down
version of the OpenSPARC T1 targeted towards embedded
devices.
The main features of the S1 Core are:
- only one SPARC CPU Core (capable of running 4 threads);
- a bridge from the PCX/CPX protocol to the Wishbone bus
interface supported by several cores freely available at
www.opencore.org ;
- a very very simple simulation and synthesis environment
with just few short and commented scripts;
- both simulation and synthesis should work with Icarus
Verilog 0.8 (so no commercial licenses are required).
There are a forum and mailing lists on s1.sunsource.net
so we hope to get some collaboration there; most of the
work has been done but we would like to have some help
from the community.
Happy hacking!
Fabrizio
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Fabrizio Fazzino - fabrizio@fazzino.it
Fazzino.IT - http://www.fazzino.it
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