I want to study computer architecture by reading opensparc source code . but the source has no any comments, no description about each modules, files.
because I am one newbie, i don't understand the module name, such as "module bw_clk_gl" , what is the meaning"bw"? what is the meaning "gl"?
are there any document about the verilog code? thanks
I want to study computer architecture by reading opensparc source code,
but the source has no any comments, no description about each modules, files.
Looking at Verilog code is like looking at the raw bits of a compiled software binary -- depending on what you're trying to understand, it may be looking at much too low of a level.
If you want to study the computer architecture (a.k.a. instruction set artchitecture, or ISA) of OpenSPARC T1, you'll want to instead consult the UltraSPARC Architecture 2005 specfication, downloadable from http://opensparc-t1.sunsource.net/index.html.
If you want to look up processor-specific architecture details, take a look at the UltraSPARC T1 Supplement to UltraSPARC Architecture 2005, also available from http://opensparc-t1.sunsource.net/index.html.
If what you really want to do is study the low-level implementation (as opposed to the architecture) of OpenSPARC T1, that's when you need to look at the actual Verilog code.If you come from the software or high-level architecture parts of the world, reading Verilog is not for the faint of heart ;-) ... it is not a procedural language, like most software programming languages, so might be awkward to follow.Sun is also working on a microarchitecture specification for OpenSPARC T1, which should be available on the OpenSPARC web stie by this fall -- that will be another source of detailed implementation information (and be much more readable than Verilog for most of us).
because I am one newbie, i don't understand the module name, such as
"module bw_clk_gl" , what is the meaning"bw"? what is the meaning "gl"?
Regarding the Verilog module names ... "bw" is a holdover from years ago that no longer means anything. I'm told that it was an abbreviation for an old, temporary processor project name (which has been changed at least twice since then!).Mentally substitute "T1_" for "bw_" and it should read better.Regarding other parts of Verilog module names, perhaps someone else in the community reading this thread can comment on/explain those?
many thanks for your reply.
the purpose I read opensparc source code is design and implement my own processor ,just for fun. so I think only read ISA specification can not give me enough information about how to design and implement a CPU.
for another purpose, I am really curious about how a real processor, such as sparc,pentium was designed, and how they work? I have read patterson's great book, but I feel there are a big gap between the computer architecture theory and real CPU. Maybe study opensparc can let me fix this gap.
can you or anyone else introduce some experiences about how to become a good cpu designer? how to learn design cpu, thanks again!
Hehe, I have the same dream of you ..
After reading patterson ' s book, i am interested in the low level design of a CPU and how to build a computer system,although it will be rough..
I am trying to read the verilog code of opensparc. In the coming 1 year , I will read the verilog code of opensaprc,finally this will be my graduate project. Is it proper if i take it as my graduate project ? Any advice?Thanks!
> After reading patterson ' s book
Just by the way, I understand that the new edition of Hennessy & Patterson's book (Computer Architecture, A Quantitative Approach) will devote an entire chapter on OpenSPARC T1 (which internally at Sun was called "Niagara")!
> I am trying to read the verilog code of opensparc.
> In the coming 1 year , I will read the verilog code
> of opensaprc,finally this will be my graduate
> project. Is it proper if i take it as my graduate project ?
Sure, OpenSPARC my be used for any academic purpose -- for any purpose at all, really. It's out there to be used both academically and commercially. Many universities are already working to incorporate it into computer architecture coursework and there are several research projects underway that use OpenSPARC T1 in various ways. One group of universities is taking a single-core subset of OpenSPARC T1 and synthesizing it into an FPGA implementation. Potentially, lots of variants of it could also be synthesized and run on an FPGA to "rapidly prototype" and evaluate architectural or implementation variations. (Think "turning around a new implementation overnight", instead of "waiting months and spending millions to get a revised chip implementation back from the fab").
There is so much interest in FPGA implementations that a separate OpenSPARC Community Project was opened up for that (see the link under "FPGA" on page http://opensparc.sunsource.net/nonav/projects/index.html)
