Is there any peripheral device interface connected to J-BUS?

Is there any peripheral device interface written in Verilog or VHDL connected to J-BUS? Even a DA or GPIO will be helpful to me.Thanks in advance!
[153 byte] By [openidea] at [2007-11-26 6:12:34]
# 1

The JBus bus functional model including

JBus Driver and JBus Monitor are included in the tar file for Chip Design and Verification.

The JBus Drivers and Monitors are written in Verilog with PLI interface to C++ code.

The OpenSPARC T1 Design and Verification User's Guide document

has exact locations of the files for JBus driver and Monitor.

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