Intro to UltraSPARC Architecture 2005
(this posting is cross-posted in my blog, http://blogs.sun.com/roller/page/dweaver)
Not only is the OpenSPARC T1 processor the first open-sourced 64-bit processorimplementation, but it (and its twin, UltraSPARC T1/Niagara) are the first processors that adheres to Sun's new processorarchitecture specification.
With this posting, I'll embark on a series of posts to introduce this new processor architecture, namedUltraSPARC Architecture 2005. We're completing the final touches for external publication of the actual specification; it should be posted on the web (onhttp://OpenSPARC.net) and the Sun processor web site (http://www.sun.com/processors/documentation.html) within a month.
To be notified when the architecture spec is posted, Login (http://www.sunsource.net/servlets/TLogin) to the OpenSPARC site and visit the OpenSPARC mailing list page (http://opensparc.sunsource.net/servlets/ProjectMailingListList) to register for the opensparc-announce mailing list.
The first question many people (even some inside Sun!) ask about the UltraSPARC Architecture is "why is a new architecture specification needed? Can't/shouldn't we just refer to the existing SPARC V9 specification plus a User's Guides for specific processors, like we've done in the past?"
Well, wecould have continued down that path. However, it would have required software developers (probably the largest group of readers) to consult not just two, but multiple documents ... primarily SPARC V9 plus various processor implementation documents.With the UltraSPARC Architecture, readers can go to asingle document to understand all they need to know about a whole generation of UltraSPARC processors, with all the most up-to-date information. A few may also want to consult implementation-specific architecture supplements.
Other factors motivating the UltraSPARC Architecture document involve the state of theSPARC V9 specification: <ul> <li> it is now over 10 years old </li>
<li> its hardcopy version contains ~90 known errata (enumerated at http://www.sparc.com/standards/v9-errata.html) ... although the PDF softcopy at SPARC International (http://www.sparc.com/standards/SPARCV9.pdf) has been updated with corrections to those bugs </li>
<li>doesn't enumerate all exception-causing conditions for each instruction</li>
<li>contains many ambiguities (one example: trap priorities) </li>
<li>doesn't contain any of the numerous standard Sun extensions (many of which have been present for over 10 years).
(fortunately, I can say all that about SPARC V9 without fear of insulting its editor ;-))</li> </ul>
The UltraSPARC Architecture 2005 specification: <ol> <li>describes processor behavior much more precisely than did SPARC V9</li>
<li>describes all the Sun architectural extensions (for example, VIS 1 and VIS 2 instructions, GSR register, and global register sets)</li>
<li>won't be a static document -- if/when documentation bugs are identified, they will be fixed and a revised version will be posted on the web</li> </ol>
Ambiguities that were present in SPARC V9 have been cleared up whereever possible in the UltraSPARC Architecture document -- and when not, are spelled out as explicit implementation dependencies.In each instruction description, all exceptions that can be triggered by the instruction are now listed, along with the precise conditions that can cause each exception. Whereever possible, old implementation dependencies were resolved and closed, so there are fewer gratuitous differences between implemenations.
Does this specification replace SPARC V9?Yes and no. SPARC V9 is still the <i>standard</i> by which (64-bit) SPARC implementations are measured; compliance with it is a prerequisite for using the trademarked name "SPARC". And SPARC V9 covers 64-bit SPARC processors from all vendors (primarily Sun and Fujitsu, as I write this), whereas the UltraSPARC Architecture only applies to UltraSPARC processors (and to OpenSPARC T1).For anyone using a Sun UltraSPARC or OpenSPARC T1 processor, the UltraSPARC Architecture spec should be the reference of choice.
In subsequent postings, I'll assume that the reader has at least passing familiarity with the SPARC instruction set architecture, and will begin describing the new features specified in the UltraSPARC Architecture 2005 -- including Hyperprivileged mode, Chip Multi-Threading (CMT) control, new global registers set organization, new privileged instructions, and how UltraSPARC Architecture is set up to smoothly evolve over the coming years while continuing to maintain compatibility for existing SPARC application binaries.
David Weaver
UltraSPARC Architecture
Sun Microsystems / Scalable Systems Group (SSG)
